1. Field of the Invention
The field of the present invention relates to techniques for protecting virtual circuit blocks and other electrical circuit designs from unauthorized use, transfer and/or sale by providing a recognizable watermark.
2. Background
Electronic systems are built in large part using stand-alone, individually packaged chips, which are assembled on printed circuit boards (PCBs) and connected together to obtain the desired functionality. The computer industry is currently shifting towards a new design paradigm based on the use of pre-existing circuit blocks. Under this paradigm, systems are assembled by integrating several electronic circuit subsystems or circuit blocks on the same silicon substrate, which takes the place of the printed circuit board. Advances in silicon technology are responsible for allowing larger and more complex designs to be formed on a single chip, and hence enabling entire systems to be placed on the same silicon substrate.
At the same time as silicon technology has been improving, market demands continue to push designers to develop chip designs more rapidly and efficiently. A recent trend to increase design speed and efficiency involves the re-use or recycling of electronic circuit blocks or subsystems, which are alternatively referred to as xe2x80x9ccoresxe2x80x9d, xe2x80x9cvirtual component blocksxe2x80x9d or xe2x80x9cIPsxe2x80x9d (an acronym for xe2x80x9cIntellectual Properties,xe2x80x9d which denotes the proprietary nature of these pre-packaged circuit blocks).
Once the design for a virtual component block has been tested and verified, it can be re-used in other applications which may be completely distinct from the application which led to its original creation. For example, a subsystem for a cellular phone ASIC may contain a micro-controller as well as a digital signal processor and other components. After the design for the cellular phone subsystem has been tested and verified, it could be re-used (as a virtual component block) in, for example, an automotive application. Design reuse of virtual component blocks allows a designer to Complete a design much faster than building the entire design from scratch, and avoids the need for debugging, testing and verification of the subsystems embodied in the virtual component block.
Since virtual component blocks, or IPs, physically exist on magnetic storage devices, they are relatively easy to copy, forge and re-design. Moreover, the increased efficiency brought about by the existence of virtual component blocks also provides an incentive for unauthorized use, re-use transfer or sale of these items. Providers of virtual components are therefore in need of an effective method of protecting their designs, so that they are not deprived of the benefits of the resources spent in design development or procurement of virtual component blocks.
Traditionally, protection of circuit designs has largely been through legal means such as non-disclosure agreements, patents or copyrights. By themselves, however, such legal means are of limited use, because detection of illegal copying, forging, transfer or re-use of proprietary virtual component blocks is difficult. It can be challenging to determine whether a virtual component block was illegally acquired by a particular user. The user, for example, may make superficial changes to the virtual component block to disguise its illicit source. Furthermore, the costs involved in preventing or containing unauthorized copying, re-use or transfer of virtual- component blocks, and in discovering whether particular virtual component blocks have been illegally acquired, can be excessive.
One conventional method which has been used in an attempt to protect proprietary virtual circuit blocks is a technique known as xe2x80x9ctagging.xe2x80x9d Tagging involves the creation of an electronic document containing information about the ownership of the virtual component block. The electronic document, in text form, is typically embedded into the virtual component block at the mask level. Usually, the circuit mask is implemented in a standard language such as GDSII which allows for the convenient insertion of text. However, because text at the mask level may be easily removed, tagging is not especially effective.
Tagging also has the disadvantage that it does not generally protect circuit designs (such as virtual component blocks) at higher levels of abstraction than the mask level. Tagging does not provide for traceability of a mask level file to a higher-level instantiation that may have been illegally obtained in violation of the owner""s proprietary rights.
Given the anticipated growth in commerce related to virtual component blocks, the electronic circuit design industry is in dire need of a method of protecting their proprietary virtual circuit designs that is more effective and affordable than existing schemes.
Recently, the concept of watermarking has been applied to digital audio-visual files. Watermarking is a technique that has traditionally been used with banknotes and other paper documents to discourage counterfeiting. The technique generally consists of embedding semi-transparent symbols on paper so that the original document can be distinguished from a copy.
One method which attempts to apply watermarking concepts in the context of virtual circuit blocks is described in xe2x80x9cWatermarking Layout Topologiesxe2x80x9d appearing in Proc. IEEE Asia-South Pacific Design Automation Conference (January 1999), pp. 213-216, by Eduardo Charbon and Ilhami Torunoglu, which article is hereby incorporated by reference as if set forth fully herein. In that paper, a watermarking technique is described which addresses the particular problem of protecting virtual circuit blocks at the lowest abstraction level, i.e., the physical layout implementation. However, a shortcoming of this watermarking technique is that unauthorized deletion of the watermark is still possible at abstraction levels higher than the physical implementation, such as in netlists and register transfer logic (RTL) representations.
Another technique which attempts to apply watermarking concepts in the context of virtual circuit blocks is described in xe2x80x9cHierarchical Watermarking in IC Design,xe2x80x9d appearing in Proc. IEEE Custom Integrated Circuits Conference (May 1998), pp. 295-298, by Edoardo Charbon. However, the watermarking technique described therein also suffers from the possibility of unauthorized tampering and/or deletion.
There is a need for a more effective technique for protecting virtual component blocks, and other similar types of circuit design files, from unauthorized copying, re-use, transfer or sale. There is further a need for such a technique that is cost-effective yet relatively simple to implement, and that is resistant to tampering by the user.
The invention in one aspect provides systems and methods for protecting electronic circuit blocks and other virtual component blocks from unauthorized use, transfer and/or sale by watermarking and, more particularly, by embedding hidden, recognizable codes into a virtual component block.
In one embodiment, a system and/or method for watermarking a circuit design are provided wherein the circuit design comprises at least one internal sequential function, which may be embodied, for example, as a finite state machine. According to a preferred embodiment, free input configurations in the internal sequential function of the circuit design are identified and modified to generate a predictable output sequence when a specified input sequence is applied, by using said free input configurations. The specified input sequence and predictable output sequence collectively comprise an input/output signature (referred to herein as xe2x80x9cI/O signature).
If there are not enough free input configurations to meet specified watermarking robustness criteria, then additional free input configurations may be added. Where the sequential function being modified is a finite state machine, free input configurations may be added by adding one or more inputs, outputs or states to the finite state machine.
Different embodiments are described herein for selecting an optimum path among state transitions so as to minimize overhead caused by inclusion of the input/output signature. A methodical search of a decision tree may be used to select the optimal path, or else Monte Carlo methods or branch-and-bound searching may be used.
Further embodiments, variations and enhancements are also described herein.